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TPS2346
 
SLUS529  MAY 2002
19
www.ti.com
APPLICATION INFORMATION
UDG02006
t0:   ENABLE
 input brought low to initiate a turn-on sequence.
t1:   Channel 1 (5.15V) gate enabled; IRAMP capacitor starts charging with slow turn-on clamp.
Slow charging of load voltage (back-end 5.15V) begins.
t2:   Slow turn-on period ends; linear ramp of current to the load begins.
t3:   Constant di/dt period ends; load voltage ramping continues at IMAX rate.
t4:   BackEnd 5.15 V reaches input DC potential.
t5:   Channel 2 (5V) gate is enabled. Slow charging of load voltage (back-end 5V) begins. Fault monitoring on Ch. 1 enabled.
t6:   Slow turn-on period ends; linear ramp of current to load begins.
t7:   Constant di/dt period ends. Load voltage ramping continues at IMAX rate.
t8:   BackEnd 5V reaches input DC potential.
t9:   Channel 3 (3.3V) gate is enabled. Slow charging of load voltage (back-end 3.3V) begins. Fault monitoring on Ch. 2 enabled.
t10: Slow turnon period ends; linear ramp of current to the load begins.
t11: Constant di/dt period ends. Load voltage ramping continues at IMAX rate.
t12: BackEnd 3.3V reaches input DC potential.
t13: Channel 4 (5.2V) gate is enabled. Slow charging of load voltage (back-end 5.2V) begins. Fault monitoring on Ch. 3 enabled.
t14: Slow turn-on period ends; linear ramp of current to load begins.
t15: Constant di/dt period ends; load voltage ramping continues at IMAX rate.
t16: Back-end 5.2 V reaches input DC potential.
t17: Channel 4 UV/OV fault enable pulse.
t18: PG
 output pulled low.
V
O(IRAMP)
BACK-END
5.15-V
BACK-END
5-V
BACK-END
3.3-V
BACK-END
5.2-V
t0
t1  t2
t3
t4
t5
t6
t7
t8
t9
t10   t11
t12
t13
t14   t15
t16
t17
t18
0 V
PG
5.2 V
0 V
3.3 V
0 V
5 V
0 V
5.15 V
0 V
1.35 V
1.5 V
ENABLE
Figure 19. TPS2346 Ramp-Up Sequence
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